Autors: Badarov, D. H., Mihov, G. S.
Title: A methodology for phase-frequency detectors testing based on Xilinx FPGA
Keywords: digital phase synchronizers, FPGA, phase detectors, phase-to

Abstract: A methodology for phase and phase-frequency detector testing is developed and implemented on Xilinx FPGA programmable logic device. Several test setups and circuits for phase-to-amplitude response testing are proposed in this article. The circuits for test signals generation are discussed. The output pulses of the tested phase detectors are converted to a digital value in order to obtain the phase-to-amplitude response of the examined detectors. The variations of the circuits for the different phase detectors testing is discussed.

References

    Issue

    X National Conference with International Participation "Electronica 2019", 2019, Bulgaria,

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    Цитирания (Citation/s):
    1. Behrouj A., Zanjani S.M., Honarvar M.A., Design and simulation of minimal dead-zone phase detector in X-band using CNFET technology, 2025, Physica Scripta, issue 6, vol. 100, DOI 10.1088/1402-4896/add583, issn 00318949, eissn 14024896 - 2025 - в издания, индексирани в Scopus

    Вид: постер/презентация в национален форум с межд. уч., индексирана в Scopus