|Autors: Dimitrievski, I. M., Mollov, V. S.|
Title: Comparison Between Routing Algorithms Applied in NoC Architectures for Smart Ethernet Switches Routing Schemes
Keywords: Ethernet, routing, smart switches, Network on chip, Noxim, throughput, latency
Abstract: In this paper we evaluate different routing algorithms in respect to the average latency, total latency, average throughput, and global throughput. Performance of the Network on Chip (NoC)-based Ethernet smart switches has been rapidly improved and they are required to fulfill some special standards, lowest possible time delay and overall latency, an increased traffic speed through the network switch, and also an increased bandwidth and throughput. We are using Noxim discrete event simulator specialized for NoC architectures simulations. Random selection, buffer level have been used to evaluate the above mentioned parameters. We evaluate NoC model of mesh 8x8 structures which is the most used model nowadays. The state-of-the-art methods for simulation and performance evaluation results of some basic NoC’s topologies are also presented here.
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