Autors: Brusev, T. S., Radonov, R. I.
Title: Layout Design of Switching-Mode Amplifier for LTE Applications
Keywords: Switching-mode amplifiers, CMOS 0.35 µm 4-metal technology, Layout, Efficiency, Cadence

Abstract: The layout design of hysteresis controlled switching-mode amplifier for fourth generation Long-Term Evolution (4G LTE) applications is presented in this paper. Those circuits are used in envelope amplifiers (EAs) architectures, which supply voltage to the transmitter’s power amplifier (PA). The proper layout design can help to improve the overall efficiency of EA, because most of the energy delivered to PAs is supplied by a switching-mode amplifier. The design is made with Cadence using AMS CMOS 4-metal 0.35 µm technology. The investigation and comparison between efficiency results from the simulation of schematic and layout with extracted parasitic devices is performed.


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Annual Journal of Electronics, vol. 9, pp. 197 - 200, 2015, Bulgaria, Technical University of Sofia, ISSN 1314-0078

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