Autors: Badarov, D. H., Mihov, G. S.
Title: All-Digital Phase Locked Loop with Single Reference Frequency Oscillator
Keywords: all-digital PLL; FPGA; frequency multiplier; low frequency reference; Xilinx.

Abstract: All-digital Phase Locked Loop is designed in this article. A combinational frequency multiplier is developed and tested to achieve completely integrated system using only one low frequency reference oscillator. Adaptive proportional-integral regulation is used to ensure high stability, low phase noise and fast synchronization in wide frequency range. The system is developed and tested on Spartan 3E FPGA by Xilinx.

References

    Issue

    Proceedings of 29th International Scientific Conference Electronics - ET 2020, 2020, Bulgaria,

    Вид: постер/презентация в международен форум, публикация в реферирано издание, индексирана в Scopus