Autors: Angelov, G. V., Bonev N., Rusev, R. P., Hristov, M. H., Paskaleva A., Spassov D.
Title: Verilog-A model of a high-k HfO2-Ta2O5 capacitor
Keywords: Device modeling, compact models, circuit simulation, high-k

Abstract: A circuit simulation model of a MOS capacitor using high-k HfO2–Ta2O5 mixed layer structure is developed using Verilog-A hardware description language. Model equations are based on the BSIM3v3 model core. Capacitance-voltage (C–V) and current-voltage (I–V) characteristics are simulated in Spectre circuit simulator within Cadence CAD system and validated against measurements of stack structure.



    Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2011), pp. 470-475, 2011, Poland, ISBN 978-83-932075-0-3

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    Цитирания (Citation/s):
    1. Shrivastava, A.; Damahe, P.; Kumbhare, V. R.; Majumder, M. K.; "Designing SRAM Using CMOS and CNTFET at 32 nm Technology," 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS), Rourkela, India, pp. 284-287 (2019) DOI: 10.1109/iSES47678.2019.00070 - 2019 - в издания, индексирани в Scopus или Web of Science

    Вид: публикация в международен форум, публикация в реферирано издание, индексирана в Scopus