Autors: Filipova, K. V., Yankov V., Filipov F., Kralev Y., Dimov Ts.
Title: Investigating opportunities for hardware realization of transfer functions
Keywords: MATLAB; Simulink HDL coder; VHDL;HDL code generation; testbench; representation of linear systems; discretization; top – down synthesis; Xilinx ISE Design Suit

Abstract: In the paper we use a model of real-world process, represented with well-posed transfer function (TF) - W(p). It is used to build a Simulink model of the process. It was necessary the TF to be discretized with appropriately chosen sample time T0 and discretization method. As a result we get a discrete transfer function W(z). These two models, described with respective TFs, are simulated in Simulink, and after that we estimate their functional nearness. For generation of hardware description in HDL for the model it’s used Simulink HDL coder toolbox..



    Sixth International Conference - Computer Science'2011, 2011, Macedonia,

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