Autors: Kanev, I. T., Pavlova, P. E.
Title: Optimized linear spatial filters implemented in FPGA
Keywords: DSP,FPGA,Linear Spatial Filtering, Partial Sum, VHDL

Abstract: Linear spatial filters (LSF) are used for filtering of digital images with the purpose of blurring, noise reduction, detail enhancement etc. In this paper, described is an approach for optimizing of LSF by utilizing parallel algorithms and their hardware implementation on FPGA. A model and an algorithm based on partial sums and aimed at calculating the filtered pixels are presented. Defined are criteria for comparing of the different types of linear filters. A schematic diagram of an FPGA-based DSP operational block is shown. VHDL is utilized for the hardware design. Conducted are studies focused on comparing the partial sums and the non-partial sums based methods of filtering. It is ascertained that the methods employing partial sums reduce the number of operations to the size of the window (3, 5, 7,..) . These FPGA-based LSF are suitable for applications using threshold detecting, edge detection or image detail enhancement.



    IOSR Journal of VLSI and Signal Processing (IOSR-JVSP), vol. 7, issue 1, pp. 01-07, 2017, India, e-ISSN: 2319 – 4200, p-ISSN No. : 2319 – 4197, DOI: 10.9790/4200-0701010107

    Вид: статия в списание, публикация в издание с импакт фактор