Autors: Pandiev, I. M.
Title: Verification of VHDL-AMS Simulation Model for Digitally Programmable Monolithic Instrumentation Amplifiers
Keywords: circuit simulation, hardware description languages, operational amplifiers, SPICE

Abstract: This paper focuses on the verification of the VHDL-AMS model [1] for digitally programmable monolithic instrumentation amplifiers. The modeling parameters are extracted for commercially available in-amp AD8253 from Analog Devices, by analyzing semiconductor data books or through characterization measurements. The values for the static and dynamic parameters obtained by simulation of the proposed model are compared against the typical values of the corresponding parameters from the datasheets for the real device at different gains AV and temperature 300 K. The proposed model shows good agreement between typical values and simulated results. Furthermore, the maximum value of the relative error does not exceed 8 %. The validation of the model is performed at differential and common-mode input signals by comparing the simulation results with the behavior of the SPICE compatible macro-model for in-amp AD8253.

References

    Issue

    2019 IEEE 31st International Conference on Microelectronics, MIEL 2019, issue 8889618, pp. 269-272, 2019, Serbia, IEEE, ISBN 978-172813419-2

    Вид: публикация в международен форум, публикация в реферирано издание, индексирана в Scopus и Web of Science