Детайли за публикацията
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Autors: Dimitrievski, I. M., Mollov, V. S.
Title: OVERVIEW AND SIMULATION OF NOC-BASED SMART ETHERNET SWITCHES
Keywords: NoC, average latency, average throughput, network simulators

Abstract: Nowadays, when Networks on Chip (NoC) based single-chip networking devices are designed to achieve maximum performance, appropriate methods for testing should be developed. Performance of the NoC-based Ethernet smart switches has been rapidly improved and they are required to fulfill some requirements like lowest possible time delay and overall latency, an increased traffic speed through the network switch, and also an increased bandwidth and throughput. The state-of-the-art methods for simulation and performance evaluation results of some basic NoC’s topologies are presented here

References

  1. Ile Dimitrivski, Valentin Mollov, 2016, OVERVIEW AND SIMULATION OF NOC-BASED SMART ETHERNET SWITCHES, Sofia, 15-16 September 2016, <SOoia>, Technical University of Sofia

Issue
Advanced Aspects of Theoretical Electrical Engineering Sofia, 2016, pp. 193-199, 2016, Bulgaria, Technical University of Sofia, ISSN 1313-9487

Full text of the publication

Вид: публикация в национален форум

Въведена от: докт. д-р Иле Димитриевски