Autors: Radonov, R. I.
Title: Considerations for the Design of Bond Pads in Integrated Circuits using CADENCE
Keywords: CADENCE, bond pads, packaging

Abstract: This paper makes a review of the common rules used for the design of integrated circuits using CAD software and the peculiarities related to the bond pads. The possible layout solutions for bond pads and their requirements depending on the packaging are presented. Some new effects which resulted from the layout solutions are defined.


  1. S. Murali, N. Srikanth , Y. M. Wong and Charles J. Vath III., Fundamentals of thermo-sonic copper wire bonding in microelectronics packaging, Journal of Materials Science, Volume 42, Number 2 / January, 2007, pp 615 – 623.
  2. Haksoo Han, Hyunsoo Chung, Yung-Il Joe, Seongsu Park, Gwangchong Joo, Nam Hwang and Minkyu Song, The application of flip-chip bonding interconnection technique on the module assembly of 10 Gbps laser diode, Volume 27, Number 8 / August, 1998, pp 985 – 989.
  5. ng /Dl_Drahtbonden,IMG2_DEFAULT.html
  6. Luiz O. S. Ferreira, Deep Lithography for Microfabrication ResourceId=421
  7. YAIR ALCOBI, Stacked Die & Multi-tier Application, Advanced Packaging, October 2005, ap_stacked_die_oct05.pdf
  8. Eric Bogatin, Roadmaps of Packaging Technology, Integrated Circuit Engineering Corporation, 1997, ISBN: 1-877750-61-1.


Annual Journal of Electronics, vol. 4, number 1, pp. 36 - 37, 2010, Bulgaria, ISSN 1313-1842

Вид: статия в списание