|Autors: Radonov, R. I.|
Title: Cadence as a Nanotechnology Design Tool
Keywords: CADENCE, nanoelectronics, nanometer design
Abstract: This paper presents the capabilities of the industry standard Electronics Design Automation (EDA) tool CADENCE® for design of nanometer devices and circuits. Examples from different successfully accomplished projects are shown.
- Cadence Design Systems Inc., Down to the wire, http://w2.cadence.com/whitepapers/4064 _NanometerWP_fnlv2.pdf, date of last access 20.11.2012.
- Centaur Designs Nano 3000 with Cadence Virtuoso Space-Based Router, http://edageek.com/2010/05/ 03/via-eda360/, date of last access 20.11.2012.
- The A to Z of nanotechnology, Cadence Solutions Selected for TSMC 20 nm Design Infrastructure, http://www.azonano.com/news.aspx?newsID=25747, date of last access 20.11.2012.
- Warren A. Hunt, Jr., Verifying VIA Nano Microprocessor Components, http://fmcad10.iaik. tugraz.at/Papers/papers/01Tutorials/002Hunt.pdf, date of last access 20.11.2012.
- R. Bahal, S. Akashe, Modeling and Estimation of Total Leakage Current in Nano-scaled 7T SRAM Cell Considering the Effect of Parameter Variation, Vol.2, Issue 1,Jan-Feb 2012, pp.489-492, Vol.2, Issue 1,Jan-Feb 2012, pp.489-492
- R. Vaddi, V. Pot, J.T.S. Lin, T. Kim, Design, Modeling and Simulation of an Anchorless Nano-Electro-Mechanical Nonvolatile Memory, 2012 International Conference on Solid-State and Integrated Circuit (ICSIC 2012), March 17-18, 2012, Singapore, vol. 32, pp. 12 - 17.
|Nanoscience & Nanotechnology – Nanostructured materials application and innovation transfer, issue 13, pp. 197 - 198, 2013, Bulgaria, ISSN 1313-8995|