Autors: Kirilov, S. M., Mladenov, V. M.
Title: Application of New Metal-Oxide Memristor Models in Digital and Analog Electronic Circuits
Keywords: improved memristor models; LTSPICE memristor models; memrist

Abstract: Memristors, as novel nonlinear electronic components are under intensive analyses, owing to their excellent switching and memory properties, low power usage, nano-sizes, and good compatibility to traditional CMOS integrated chips. They are applicable in electronic schemes, incorporated in chips. Engineering of memristor circuits presents opportunities for design of chips with ultra-high density and many applications. In the last years, several modified and enhanced memristor models, built on the frequently used standard models are proposed. They are simplified, with a good accuracy and high operating rate. The aim of this paper is to present the applicability of the enhanced models in electronic schemes and a comparison of their properties and performance in LTSPICE environment. Several schemes, as memory crossbars, logic gates, neural nets, and various reconfigurable circuits are analyzed. The modified memristor models are compared to various standard models, according to different c

References

    Issue

    International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), pp. 1-4, 2023, Portugal, IEEE, doi: 10.1109/SMACD58065.2023.10192136

    Цитирания (Citation/s):
    1. S. Radovanović, M. P. Ivaniš and D. Tošić, "Memristive Multi-layer Reconfigurable Dual-Band Bandpass Filter," 2023 IEEE 33rd International Conference on Microelectronics (MIEL), Nis, Serbia, 2023, pp. 1-4, doi: 10.1109/MIEL58498.2023.10315851. (Scopus, Google Scholar) - 2023 - в издания, индексирани в Scopus и/или Web of Science
    2. Vinay, G. and Gupta, K.A., 2024, September. “MAC Unit Implementation using Hybrid-Memristor Ratioed Logic,” In 2024 3rd International Conference for Advancement in Technology (ICONAT) (pp. 1-5). IEEE. ISBN 979-835035417-1, DOI 10.1109/ICONAT61936.2024.10774885 (Scopus, Google Scholar) - 2024 - в издания, индексирани в Scopus и/или Web of Science
    3. Adithya, H.K., Kulkarni, A., Archana, B. and Chandana, K.T., 2024, September. “A Study on Circuit Optimization and Performance of Memristor-Integrated 3 bit Pipeline DAC,” In 2024 IEEE North Karnataka Subsection Flagship International Conference (NKCon) (pp. 1-6). IEEE. ISBN 979-835036456-9, DOI 10.1109/NKCon62728.2024.10774831 (Scopus, Google Scholar) - 2024 - в издания, индексирани в Scopus и/или Web of Science
    4. Su, X., Xiong, B., Yu, J. and Liu, J., 2024, October. “A Resistor-Free Grounded High-Frequency Memristor Emulator,” In 2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) (pp. 1-3). IEEE. DOI: 10.1109/ICSICT62049.2024.10831028 (Scopus, Google Scholar) - 2024 - в издания, индексирани в Scopus и/или Web of Science
    5. Fatemieh, S.E., Asgari, S. and Reshadinezhad, M.R., 2025. “Fast and low energy approximate full adder based on FELIX logic,” arXiv preprint arXiv:2505.06888., https://doi.org/10.48550/arXiv.2505.06888, pp. 1-23 (Google Scholar) - 2025 - от чужди автори в чужди издания, неиндексирани в Scopus или Web of Science
    6. Yang, R., Peng, S., Cai, W. and Deng, W., 2025, June. “Compact modeling of hafnium oxide memristors including temperature effects based on conductive filaments,” In Second International Conference on Power Electronics and Artificial Intelligence (PEAI 2025) (Vol. 13657, pp. 50-57). SPIE. https://doi.org/10.1117/12.3067058 (Google Scholar) - 2025 - от чужди автори в чужди издания, неиндексирани в Scopus или Web of Science
    7. Ranjan N., Singh C.P., Ranjan H., Singh V.P., Pandey S.K., A novel linear memristor model for data storage and synaptic applications, 2025, Journal of Computational Electronics, issue 6, vol. 24, DOI 10.1007/s10825-025-02438-8, issn 15698025, eissn 15728137 - 2025 - в издания, индексирани в Scopus
    8. Mandal G., Ghosh M., Borah S.S., Mondal P., Kumar S., A high-frequency memristor emulator: A novel design based on current mode analog building blocks, 2026, AEU International Journal of Electronics and Communications, issue 0, vol. 205, DOI 10.1016/j.aeue.2025.156176, issn 14348411, eissn 16180399 - 2025 - в издания, индексирани в Scopus

    Вид: публикация в международен форум, публикация в реферирано издание, индексирана в Scopus